special process

• Si high aspect ratio etching process

  It has the high aspect ratio etching process capability of Si materials, and has mature Bosch process and non Bosch process. The related processes are widely used in Si based MEMS sensors, TSV 3D packaging, shallow isolation grooves between MOSFET and DRAM cells, etc.

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    SEM of deep Si etching process: (a) non Bosch process; (b) - (c) Bosch process

• GaN Low Damage Etching Process

  It has the ability to etch GaN, p-GaN, AlGaN and other Ⅲ - Ⅴ compound materials, realizes the rapid etching and low damage etching process of GaN, and is compatible with the atomic layer etching (ALE) process of AlGaN. The related processes are widely used in the Mesa etching, isolation etching, gate etching and other aspects of GaN based optoelectronic devices.

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    SEM diagram of ICP etching GaN: (a) p-GaN and AlGaN etching results; (b) AlGaN Etching Low Damage Process

• Ion beam etching process

  Able to etch SiO₂, SiNx, Al, Au, Ti, Pt, ITO and other materials, the tilt angle of the platform is - 90 °~80 °, and the uniformity within/between chips/between batches is ≤ 5%. The related processes are widely used in materials and metals that are difficult to etch, Pt thin film temperature sensors, piezoelectricity of radio frequency MEMS (SAW/FBAR/BAW), and complex magnetic materials (AMR/GMR, TMR/MRAM) of mixed metal dielectric materials by electrode etching.

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    SEM Diagram of Pt/Ti Etched by IBE

• Wafer bonding process

  Based on the anodic bonding process, the bonding between Si wafer/Si wafer with surface pattern structure and glass can be realized. The bonding pressure can be controlled at 0-20KN, the temperature is 0-450 ℃, the voltage is 0-2000V, and the pattern alignment error after bonding is ≤± 3 μ m。 Au Au bonding, Au Sn, Ge Al bonding can be realized based on hot pressing bonding process. The bonding pressure can be controlled at 0-100KN, the temperature is 0-550 ℃, and the alignment accuracy after bonding is ≤± 5 μ m。

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    High power GaN semiconductor laser lamp

• Stealth cutting process

  High precision and nondestructive cutting capability for Si materials. Invisible cutting is to break the Si material inside the wafer by infrared laser, forming a damage layer, and achieve high-precision wafer cutting. It can realize damage free cutting of Si wafer surface. Wafer cutting thickness can reach 750 μ m. The cutting speed reaches 800mm/s.

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    Optical micrograph of invisible cutting process

• Photolithography

  Step projection lithography machine Lithography pattern Contact UV lithography machine can achieve the minimum exposure resolution of 800nm, and the overlay accuracy is ± 1 μ m ； The DUV lithography machine can achieve the minimum exposure resolution of 130nm for 8-inch wafers, and the nesting accuracy is ± 25nm; The step projection lithography machine can achieve the minimum exposure resolution of 450nm, and the nesting accuracy is ± 100nm, meeting the requirements of 4-inch, 6-inch and 8-inch wafer lithography processes.

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    Photolithography of step projection lithography machine

• GaN Micro LED process

  Epitaxial growth of 6-inch Si based GaN LED material, 256 × 192（15 μ M pixel pitch) passive micro display chip, 2560 × 1920 ultra-high resolution red, green and blue monochrome micro display chip process development, the pixel density can reach 5000 ppi, pixel spacing 5 microns. A complete process flow for preparing 8-inch high resolution chips is formed by directly bonding 8-inch Si substrate GaN Micro LED epitaxial wafers with 8-inch Si based CMOS micro display drive wafers. Single red, green and blue full-color image display is realized by quantum dot lithography technology, and full-color Micro LED is successfully applied to small volume near eye display module.

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    8-inch Micro LED micro display wafer

• GaN based enhanced HEMT device process

  The problem of p-GaN etching damage and precise control is solved by using H-plasma to treat p-GaN enhanced power electronic devices. At present, 50 mm gate width p-GaN gate enhanced GaN HEMT has been prepared, the threshold voltage is 2.3 V (defined by the maximum transconductance method), and the maximum drain current ID is 13.7A@VGS =6V (274 mA/mm), the maximum transconductance Gm is 4.7S@VGS =3.9V (94 mS/mm), the threshold hysteresis of forward and reverse scanning is only 45 mV, the switching ratio reaches~109, the ON resistance RON is 235 m Ω (11.75 Ω• mm), and there is almost no hysteresis in forward and reverse scanning. 850V off state voltage, leakage current 0.01 µ A/mm.

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    GaN based enhanced HEMT device

• Low temperature high quality medium film deposition process

  It has a low temperature (20~180 ℃) deposition process for SiO₂, SiNX, amorphous silicon and other materials. The deposition rate of SiO₂and SiNX can be ≥ 15nm/min, the absolute value of film stress can reach SiO₂≤ 300MPa and SiNX ≤ 500MPa, and the BOE corrosion rate (BOE (7/1) @ RT): SiO₂≤ 300nm/min; SiNX ≤ 50nm/min, homogeneity within and between tablets<± 5%. The related processes have been widely used in low temperature deposition, micro groove filling, MEMS pressure sensors, GaN based optoelectronic devices, etc. for peel off technology.

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    SEM Diagram of ICPCVD Micron Groove Filling SiO₂Process